The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 03, 2009
Filed:
Mar. 11, 2005
In-ku Kang, Cheonan, KR;
Seok Goh, Cheonan, KR;
Jin-ho Kim, Cheonan, KR;
Tae-gyeong Chung, Suwon, KR;
Yong-jae Lee, Seongnam, KR;
In-Ku Kang, Cheonan, KR;
Seok Goh, Cheonan, KR;
Jin-Ho Kim, Cheonan, KR;
Tae-Gyeong Chung, Suwon, KR;
Yong-Jae Lee, Seongnam, KR;
Samsung Electronics Co., Ltd., Gyeonggi-do, KR;
Abstract
A variety of non-rectangular IC chips having a stepped or modified periphery or edge profile including one or more recessed or indented peripheral regions are provided for incorporation in modified package configurations, single chip packages and multi-chip assemblies, both stacked and/or planar. In the planar configurations, the recessed regions may be utilized, in cooperation with another appropriately sized IC chip, to increase the packing density of the resulting device. Similarly, in the stacked configuration, the recessed regions may be utilized to provide access to bond pads of lower chips and thereby reduce the need for spacers or peripheral thinning techniques and thereby improve the strength of the resulting assembly and/or reduce the overall height of the stacked structure.