The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 27, 2009

Filed:

Apr. 25, 2006
Applicant:

Fumiki Aiso, Tokyo, JP;

Inventor:

Fumiki Aiso, Tokyo, JP;

Assignee:

Elpida Memory Inc., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/20 (2006.01); C30B 25/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device with an elevated source/drain structure provided in each predetermined position defined by the oxide film and gate wiring on a semiconductor silicon substrate, where an orthographic projection image of a shape of an upper end portion of the elevated source/drain structure on the semiconductor silicon substrate along the direction normal to the semiconductor silicon substrate is substantially in agreement with a predetermined shape defined by the corresponding oxide film and gate wiring on the semiconductor silicon substrate, and at least one of orthographic projection images of cross-sections taken along planes parallel with the semiconductor silicon substrate of the elevated source/drain structure on the semiconductor silicon substrate along the direction normal to the semiconductor silicon substrate is larger than the predetermined shape defined by the corresponding oxide film and gate wiring on the semiconductor silicon substrate.


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