The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7479706 B1

PDF
Full Text
Expired
Date of Patent:
Jan. 20, 2009

Filed:

Jul. 05, 2007
Applicant:

Hung Tsun Lin, Tainan County, TW;

Inventor:

Hung Tsun Lin, Tainan County, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/29 (2006.01);
U.S. Cl.
CPC ...
Abstract

A chip package structure includes a circuit substrate, a chip, an adhesive layer, conductive wires, and a molding compound. The circuit substrate has a first, a second surface, a slot, and a solder mask layer disposed on the first surface. The solder mask layer has a first and a second opening located at two sides of a longitude direction of the slot. The chip is disposed on the first surface and covers at least a portion of the slot. The adhesive layer is disposed between the chip and the circuit substrate and located at two sides of each of the slot, the first opening, and the second opening. The conductive wires connect the chip and the second surface through the slot. The molding compound covers the chip, the adhesive layer, and the conductive wires and the molding compound is further filling into the slot, the first and the second opening.


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Lin, Hung. (2009). Chip package structure (U.S. Patent No. 7479706). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7479706

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