The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 06, 2009
Filed:
Dec. 31, 2002
Chamath Abhayagunawardhana, Portland, OR (US);
Dave Dunning, Portland, OR (US);
Sanjay Dabral, Palo Alto, CA (US);
Ken Drottar, Portland, OR (US);
Chamath Abhayagunawardhana, Portland, OR (US);
Dave Dunning, Portland, OR (US);
Sanjay Dabral, Palo Alto, CA (US);
Ken Drottar, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A receiving device within a digital electronic system includes a sampling unit, a voter block, and a local clock phase adjustment unit. The sampling unit samples an input line at three points in time at intervals of one half of a bit period. The sampling unit delivers the values obtained in the sampling process to the voter block. The voter block determines whether to deliver an up or a down vote to the local clock phase adjustment unit. The voter block communicates with the local clock phase adjustment unit via up and down control signals. The local clock phase adjustment unit determines whether the local clock phase should be adjusted, and if so, whether to advance or delay the local clock phase. If certain meta-stable conditions are observed by the voter block, the voter block will vote in one direction in order to push the system out of the meta-stable condition.