The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 09, 2008

Filed:

Oct. 11, 2005
Applicants:

Igor Keller, Pleasanton, CA (US);

Manuj Verma, Noida, IN;

Inventors:

Igor Keller, Pleasanton, CA (US);

Manuj Verma, Noida, IN;

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

Aspects for generating a current source model of a gate include extracting the current source model of the gate. The current source model of the gate is a function of time and output voltage of the gate. Further, the current source model of the gate is extracted based on data present in a timing library. The aspects further include storing the current source model of the gate. This is carried out by using the existing, specified timing library for current source models. In this manner, additional expenditure is not incurred for formulating another timing library.


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