The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 02, 2008
Filed:
Jun. 14, 2004
Juan-carlos Calderon, Fremont, CA (US);
Soowan Suh, San Ramon, CA (US);
Jing Ling, Fremont, CA (US);
Jean-michel Caia, San Francisco, CA (US);
Augusto Alcantara, Fremont, CA (US);
Alejandro Lenero Beracoechea, Dublin, CA (US);
Juan-Carlos Calderon, Fremont, CA (US);
Soowan Suh, San Ramon, CA (US);
Jing Ling, Fremont, CA (US);
Jean-Michel Caia, San Francisco, CA (US);
Augusto Alcantara, Fremont, CA (US);
Alejandro Lenero Beracoechea, Dublin, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A method and apparatus for managing memory for time division multiplexed high speed data traffic is provided. The method and apparatus utilize an interleaving approach in association with multiple memory banks, such as within SDRAM, to perform highly efficient data reading and writing. The design issues a first command or access command, such as a read command or write command to one memory bank, followed by an active command to a second memory bank, enabling efficient reading and writing in a multiple data flow environment, such as a SONET/SDH virtual concatenation environment using differential delay compensation.