The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 11, 2008
Filed:
Apr. 10, 2006
Yin-pin Wang, Kaohsiung, TW;
Carlos H. Diaz, Mountain View, CA (US);
Yin-Pin Wang, Kaohsiung, TW;
Carlos H. Diaz, Mountain View, CA (US);
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
A semiconductor structure including SRAM cells with improved write margins and a method for forming the same are provided. The semiconductor structure comprises a substrate including a core circuit and an SRAM cell. The SRAM cell includes a pull-up PMOS device that comprises a first source/drain region in the substrate, a first SiGe stressor having a portion overlapping at least a portion of the first source/drain region, and a first current-tuning region having a portion overlapping at least a portion of the first source/drain region. The core circuit comprises a core PMOS device that comprises a second source/drain region in the substrate, and a second SiGe stressor having a portion overlapping at least a portion of the second source/drain region. The core PMOS device is free of current-tuning regions.