The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 28, 2008

Filed:

May. 25, 2005
Applicants:

Hiroshi Yoshihara, Round Rock, TX (US);

Sang Hoo Dhong, Austin, TX (US);

Osamu Takahashi, Round Rock, TX (US);

Takaaki Nakazato, Austin, TX (US);

Inventors:

Hiroshi Yoshihara, Round Rock, TX (US);

Sang Hoo Dhong, Austin, TX (US);

Osamu Takahashi, Round Rock, TX (US);

Takaaki Nakazato, Austin, TX (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G06F 1/26 (2006.01); G06F 1/32 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods and apparatus provide for enabling a digital circuit by biasing at least one switch transistor ON such that a voltage potential of a virtual ground node is substantially equal to a voltage potential of a ground node for a power supply to the digital circuit, wherein the digital circuit is implemented using a plurality of transistors in a silicon-on-insulator (SOI) arrangement and at least some of the transistors are referenced to the virtual ground node; and disabling the digital circuit by biasing a gate terminal of the switch transistor below the voltage potential of the ground node.


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