The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 28, 2008
Filed:
Aug. 17, 2006
Sung-gyu Kang, Suwon-si, Gyeonggi-do, KR;
Seung-mo Lim, Suwon-si, Gyeonggi-do, KR;
Jae-chang Lee, Hwaseong-si, Gyeonggi-do, KR;
Woon-bae Kim, Suwon-si, Gyeonggi-do, KR;
Sung-gyu Kang, Suwon-si, Gyeonggi-do, KR;
Seung-mo Lim, Suwon-si, Gyeonggi-do, KR;
Jae-chang Lee, Hwaseong-si, Gyeonggi-do, KR;
Woon-bae Kim, Suwon-si, Gyeonggi-do, KR;
Other;
Abstract
A silicon direct bonding (SDB) method by which void formation caused by gases is suppressed. The SDB method includes: preparing two silicon substrates having corresponding bonding surfaces; forming trenches having a predetermined depth in at least one bonding surface of the two silicon substrates; forming gas discharge outlets connected to the trenches on at least one of the two silicon substrates to vertically penetrate the bonding surface; cleaning the two silicon substrates; closely contacting the two silicon substrates to each other; and thermally treating the two substrates to bond them to each other. The trenches are formed along at least a part of a plurality of dicing lines, and both ends of the trenches are clogged. Gases generated during a thermal treatment process can be smoothly and easily discharged through the trenches and the gas discharge outlet such that a void is prevented from being formed in the junctions of the two silicon substrates due to the gases.