The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 14, 2008

Filed:

Nov. 10, 2005
Applicants:

Sheng-hsiang Tseng, Hsin-Chu, TW;

Fu-yuan Xiao, Lu-Chou, TW;

Ying-zong Juang, Tainan, TW;

Chin-fong Chiu, Hsin-Chu, TW;

Inventors:

Sheng-Hsiang Tseng, Hsin-Chu, TW;

Fu-Yuan Xiao, Lu-Chou, TW;

Ying-Zong Juang, Tainan, TW;

Chin-Fong Chiu, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

Simple but practical methods to dice a CMOS-MEMS multi-project wafer are proposed. On this wafer, micromachined microstructures have been fabricated and released. In a method, a photoresist is spun on the full wafer surface, and this photoresist is thick enough to cover all cavities and structures on the wafer, such that the photoresist will protect the released structures free from the chipping, vibrations, and damages in the diamond blade dicing process. In another method, a laser dicing system is utilized to scribe the multi-project wafer placed on a platform, and by precisely controlling the platform moving-track, the dicing path can be programmed to any required shape and region, even it is not straight. In addition, the wafer backside is mounted on a blue-tape at the beginning to enhance the process reliability.


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