The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7432581 B1

PDF
Full Text
Expired
Date of Patent:
Oct. 07, 2008

Filed:

Jan. 23, 2006
Applicants:

Toshiki Kanamoto, Tokyo, JP;

Masumi Yoshida, Tokyo, JP;

Tetsuya Watanabe, Tokyo, JP;

Takashi Ippoushi, Tokyo, JP;

Inventors:

Toshiki Kanamoto, Tokyo, JP;

Masumi Yoshida, Tokyo, JP;

Tetsuya Watanabe, Tokyo, JP;

Takashi Ippoushi, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/93 (2006.01);
U.S. Cl.
CPC ...
Abstract

An FTI structure is employed in an isolation region making contact in a Y direction with a P-type impurity region serving as a drain region of a PMOS transistor. First, second and third N-type impurity layers serving as body regions are connected to a high potential line via fourth, fifth and sixth N-type impurity layers, respectively, and further via a seventh N-type impurity layer. The fourth to sixth N-type impurity layers are provided between an insulating layer of an SOI substrate and an element isolation insulating film in a PTI region.


Find Patent Forward Citations

Kanamoto, Toshiki. (2008). Semiconductor device, method of manufacture thereof and semiconductor integrated circuit (U.S. Patent No. 7432581). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7432581

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…