The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 09, 2008

Filed:

May. 12, 2005
Applicants:

Juanita Deloach, Plano, TX (US);

Lindsey H. Hall, Plano, TX (US);

Lance S. Robertson, Rockwall, TX (US);

Jiong-ping LU, Richardson, TX (US);

Donald S. Miles, Plano, TX (US);

Inventors:

Juanita DeLoach, Plano, TX (US);

Lindsey H. Hall, Plano, TX (US);

Lance S. Robertson, Rockwall, TX (US);

Jiong-Ping Lu, Richardson, TX (US);

Donald S. Miles, Plano, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/3205 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention provides a method for manufacturing a semiconductor device. In one embodiment of the present invention, without limitation, the method for manufacturing the semiconductor device includes forming a gate structure () over a substrate () and forming source/drain regions () in the substrate () proximate the gate structure (). The method further includes forming fluorine containing regions () in the source/drain regions () employing a fluorine containing plasma using a power level of less than about 75 Watts, forming a metal layer () over the substrate () and fluorine containing regions (), and reacting the metal layer () with the fluorine containing regions () to form metal silicide regions () in the source/drain regions ().


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