The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 12, 2008

Filed:

Jan. 19, 2007
Applicants:

Shih-kuei MA, Hsinchu, TW;

Chung-yeh Lee, Hsinchu, TW;

Chun-ying Yeh, Hsinchu, TW;

Shin-cheng Lin, Hsinchu, TW;

Inventors:

Shih-Kuei Ma, Hsinchu, TW;

Chung-Yeh Lee, Hsinchu, TW;

Chun-Ying Yeh, Hsinchu, TW;

Shin-Cheng Lin, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A complementary metal-oxide-semiconductor field effect transistor (CMOSFET) is provided. The CMOSFET includes a substrate of a first conductivity type, a first epitaxial layer, a well, a second epitaxial layer of a second conductivity type, a first sinker, a second sinker, a first buried layer and a second buried layer. The first and the second epitaxial layer are sequentially disposed on the substrate. The first sinker and the first buried layer separate a first region from the second epitaxial layer. The second sinker and the second buried layer separate a second region from the second epitaxial layer. The well is disposed in the first region. A first transistor is disposed in the well. A second transistor is disposed in the second region. A deep trench isolation is disposed between the first and the second region and extends from the substrate to the upper surface of the second epitaxial layer.


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