The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 12, 2008

Filed:

Aug. 29, 2005
Applicants:

Young-sam Park, Suwon-si, KR;

Seung-beom Yoon, Suwon-si, KR;

Jeong-uk Han, Suwon-si, KR;

Sung-taeg Kang, Seoul, KR;

Seung-jin Yang, Seoul, KR;

Inventors:

Young-Sam Park, Suwon-si, KR;

Seung-Beom Yoon, Suwon-si, KR;

Jeong-Uk Han, Suwon-si, KR;

Sung-Taeg Kang, Seoul, KR;

Seung-Jin Yang, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01); H01L 29/788 (2006.01);
U.S. Cl.
CPC ...
Abstract

A nonvolatile semiconductor device and a method of fabricating the same are provided. The nonvolatile semiconductor device includes a semiconductor body formed on a substrate to be elongated in one direction and having a cross section perpendicular to a main surface of the substrate and elongated direction, the cross section having a predetermined curvature, a channel region partially formed along the circumference of the semiconductor body, a tunneling insulating layer disposed on the channel region, a floating gate disposed on the tunneling insulating layer and electrically insulated from the channel region, an intergate insulating layer disposed on the floating gate, a control gate disposed on the intergate insulating layer and electrically insulated from the floating gate, and source and drain regions which are aligned with both sides of the control gate and formed within the semiconductor body.


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