The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 29, 2008
Filed:
Sep. 28, 2007
Jun-soo Han, Cheonan-si, KR;
Gil-beag Kim, Cheonan-si, KR;
Sang-young Kim, Cheonan-si, KR;
Yong-jin Jung, Cheonan-si, KR;
Hyun-ik Hwang, Asan-si, KR;
Jun-Soo Han, Cheonan-si, KR;
Gil-Beag Kim, Cheonan-si, KR;
Sang-Young Kim, Cheonan-si, KR;
Yong-Jin Jung, Cheonan-si, KR;
Hyun-Ik Hwang, Asan-si, KR;
Samsung Electronics Co., Ltd., Gyeonggi-do, KR;
Abstract
Provided is a stack package using an anisotropic conductive film (ACF) for reducing thermal stresses exerted on chip scale packages (CSPs) during the initial manufacture of stack packages from a plurality of CSPs and for facilitating the repair and/or rework of stack packages incorporating CSPs while reducing the likelihood of damage to the CSPs. In the stack package including a plurality of CSPs stacked using an ACF, each CSP will typically include a circuit board, a semiconductor chip mounted on and electrically connected to the circuit board, and solder balls or other conductive structures arranged the semiconductor chip on the peripheral regions of the circuit board. Also provided are methods for the initial production of such stack packages and supplemental methods for the repair and rework of such stack packages.