The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 15, 2008
Filed:
Nov. 08, 2004
Ulrich Krauch, Dettenhausen, DE;
Juergen Pille, Stuttgart, DE;
Tobias Werner, Weil im Schoenbuch, DE;
Alexander Woerner, Bocbingen, DE;
Ulrich Krauch, Dettenhausen, DE;
Juergen Pille, Stuttgart, DE;
Tobias Werner, Weil im Schoenbuch, DE;
Alexander Woerner, Bocbingen, DE;
International Business Machines Corporation, Armonk, NY (US);
Abstract
According to the present invention an automated method is provided for routing and designing an LSI (Large Scale Integrated Circuit). First, at least one generic of an instance of a book to be connected is located on the chip, wherein a generic of an instance is an area defined according to the measurements of said instance. Then, an initial route to said instance is generated by optimizing the route to the corresponding generic according to given design rules. Thereby, an optimized pin location is determined for said instance. Then, on the basis of said optimized pin location a layout for said instance is generated in place of the corresponding generic. Finally, the actually generated pin is connected with the corresponding end of the initial route.