The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 08, 2008
Filed:
Nov. 22, 2004
Brett H. Engel, Hopewell Junction, NY (US);
Stephen M. Lucarini, Pleasant Valley, NY (US);
John D. Sylvestri, Poughkeepsie, NY (US);
Yun-yu Wang, Poughquag, NY (US);
Brett H. Engel, Hopewell Junction, NY (US);
Stephen M. Lucarini, Pleasant Valley, NY (US);
John D. Sylvestri, Poughkeepsie, NY (US);
Yun-Yu Wang, Poughquag, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
The present invention provides a semiconducting device including a gate dielectric atop a semiconducting substrate, the semiconducting substrate containing source and drain regions adjacent the gate dielectric; a gate conductor atop the gate dielectric; a conformal dielectric passivation stack positioned on at least the gate conductor sidewalls, the conformal dielectric passivation stack comprising a plurality of conformal dielectric layers, wherein no electrical path extends entirely through the stack; and a contact to the source and drain regions, wherein the discontinuous seam through the conformal dielectric passivation stack substantially eliminates shorting between the contact and the gate conductor. The present invention also provides a method for forming the above-described semiconducting device.