The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 24, 2008
Filed:
Sep. 13, 2005
Tsung-lung Chen, Taichung County, TW;
Hui-hung Kuo, Kaohsiung County, TW;
Cheng-yuan Hsu, Hsinchu, TW;
Chih-wei Hung, Hsin-chu, TW;
Tsung-Lung Chen, Taichung County, TW;
Hui-Hung Kuo, Kaohsiung County, TW;
Cheng-Yuan Hsu, Hsinchu, TW;
Chih-Wei Hung, Hsin-chu, TW;
Powerchip Semiconductor Corp., Hsinchu, TW;
Abstract
A method of fabricating a non-volatile memory is described. A substrate having a tunneling layer and a floating gate layer thereon is provided. A mask layer is formed on the floating gate. The mask layer has openings that expose a portion of the floating gate layer. Then, a portion of the floating gate layer is removed from the openings to form sunken regions on the surface of the floating gate layer. An inter-gate dielectric layer is formed on the floating gate layer. A control gate layer is formed on the inter-gate dielectric layer. After that, the mask layer and the floating gate layer under the mask layer are removed to form another opening. A select gate layer is formed inside the opening.