The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 10, 2008

Filed:

Jun. 17, 2004
Applicants:

Joel S. Emer, Acton, MA (US);

Shubhendu S. Mukherjee, Framingham, MA (US);

Steven K. Reinhardt, Ann Arbor, MI (US);

Christopher T. Weaver, Marlboro, MA (US);

Inventors:

Joel S. Emer, Acton, MA (US);

Shubhendu S. Mukherjee, Framingham, MA (US);

Steven K. Reinhardt, Ann Arbor, MI (US);

Christopher T. Weaver, Marlboro, MA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/10 (2006.01);
U.S. Cl.
CPC ...
Abstract

A technique to reduce false error detection in microprocessors by tracking instructions neutral to errors. As an instruction is decoded, an anti-pi bit is tagged to the decoded instruction. When a parity error is detected, an instruction queue first checks if the anti-pi bit is set. If the anti-pi bit is set, then instruction is neutral to errors, and the pi bit need not be set. Prefetch, branch predict hint and NOP are types of instructions that are neutral to errors.


Find Patent Forward Citations

Loading…