The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 13, 2008

Filed:

Mar. 19, 2004
Applicants:

David Bistry, Cupertino, CA (US);

Larry Mennemeier, Boulder Creek, CA (US);

Alexander D. Peleg, Haifa, IL;

Carole Dulong, Saratoga, CA (US);

Eiichi Kowashi, Ryugasaki, JP;

Millind Mittal, South San Francisco, CA (US);

Benny Eitan, Haifa, IL;

Inventors:

David Bistry, Cupertino, CA (US);

Larry Mennemeier, Boulder Creek, CA (US);

Alexander D. Peleg, Haifa, IL;

Carole Dulong, Saratoga, CA (US);

Eiichi Kowashi, Ryugasaki, JP;

Millind Mittal, South San Francisco, CA (US);

Benny Eitan, Haifa, IL;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/312 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method in a computer system, one embodiment includes accessing a packed data instruction and generating a corresponding set of control bits to cause a processor to alter a top of stack to zero of a programmer visible register file, accessing a floating point instruction and generating a corresponding set of control bits that cause the processor to operate on the programmer visible register file as a stack, but accessing a transition instruction between the packed data instruction and the scalar floating point instruction and generating a corresponding set of control bits to cause the processor to alter tag data to indicate that programmer visible register file is empty. The method advantageously provides a means for clearing the packed data state at the end of blocks of packed data instructions to leave the floating point state in a clear condition for subsequent operations (e.g. floating point calculations).


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