The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 25, 2008
Filed:
Jul. 21, 2006
Jason E. Blanchet, Jericho, VT (US);
James V. Crain, Jr., Milton, VT (US);
Charles W. Griffin, Jericho, VT (US);
David B. Stone, Jericho, VT (US);
Robert F. White, Essex Junction, VT (US);
Jason E. Blanchet, Jericho, VT (US);
James V. Crain, Jr., Milton, VT (US);
Charles W. Griffin, Jericho, VT (US);
David B. Stone, Jericho, VT (US);
Robert F. White, Essex Junction, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A test chip module for testing the integrity of the flip chip solder ball interconnections between chip and substrate. The interconnections are thermally stressed through an array of individual heaters formed in a layer of chip metallurgy to provide a uniform and ubiquitous source of heat. Current is passed through the interconnection to be tested by a current supply circuit using one signal I/O interconnection and the voltage drop across the interconnection to be tested from the current passed therethrough is measured by a voltage measuring circuit connected through another signal I/O interconnection. Stress initiating cracking and degradation at the interconnection creates a measurable change in voltage drop across the interconnection.