The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 22, 2008
Filed:
Nov. 01, 2006
Edward O. Travis, Austin, TX (US);
Nathan A. Aldrich, Pflugerville, TX (US);
Ruiqi Tian, Pflugerville, TX (US);
Edward O. Travis, Austin, TX (US);
Nathan A. Aldrich, Pflugerville, TX (US);
Ruiqi Tian, Pflugerville, TX (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A method for identifying areas of low overburden which degrade (increase) metal polish nonuniformity is discussed. Also described is a method for modifying these areas to increase their overburden, thus slowing down the metal polish rate and improving overall polish uniformity. The resulting structure forms slots in groups of functional lines, such as bus lines, when the functional lines have a density prior to forming the slots that exceeds a predetermined amount. In one embodiment, an area of the wafer has a maximum width of 1.5 microns in an area that has a feature density greater than approximately 50 percent. The methods and resulting structures create a higher feature density, thereby increasing polishing uniformity.