The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 15, 2008

Filed:

Feb. 02, 2005
Applicants:

Wen-shiang Liao, Miaoli Hsien, TW;

Wei-tsun Shiau, Meinong Township, Kaohsiung County, TW;

Kuan-yang Liao, Hsinchu, TW;

Inventors:

Wen-Shiang Liao, Miaoli Hsien, TW;

Wei-Tsun Shiau, Meinong Township, Kaohsiung County, TW;

Kuan-Yang Liao, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

The invention is directed to a method for manufacturing a fin field effect transistor including a fully silicidated gate electrode. The method is suitable for a substrate including a fin structure, a straddle gate, a source/drain region and a dielectric layer formed thereon, wherein the straddle gate straddles over the fin structure, the source/drain region is located in a portion of the fin structure exposed by the straddle gate and the dielectric layer covers the substrate. The method includes steps of performing a planarization process to remove a portion of the dielectric layer and the first salicide layer until the surface of the straddle gate is exposed and performing a salicide process to convert the straddle gate into a fully silicidated gate electrode.


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