The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 11, 2007
Filed:
Nov. 29, 2004
Li-te S. Lin, Hsin-Chu, TW;
Fang-cheng Chen, Hsin-Chu, TW;
Huin-jer Lin, Hsin-Chu, TW;
Yuan-hung Chiu, Taipei, TW;
Hun-jan Tao, Hsin-Chu, TW;
Li-Te S. Lin, Hsin-Chu, TW;
Fang-Cheng Chen, Hsin-Chu, TW;
Huin-Jer Lin, Hsin-Chu, TW;
Yuan-Hung Chiu, Taipei, TW;
Hun-Jan Tao, Hsin-Chu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
A method of defining a patterned, conductive gate structure for a MOSFET device on a semiconductor substrate includes forming a conductive layer over the semiconductor substrate and forming a capping insulator layer over the conductive layer. An anti-reflective coating (ARC) layer is formed over the capping insulator layer and a patterned photoresist shape is formed on the ARC layer. A first etch procedure using the photoresist shape as an etch mask defines a stack comprised of an ARC shape and a capping insulator shape. A second etch procedure using the stack as an etch mask defines the patterned, conductive gate structure in the conductive layer.