The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 11, 2007

Filed:

Nov. 10, 2004
Applicants:

Qi Xiang, San Jose, CA (US);

Niraj Subba, Sunnyvale, CA (US);

Witold P. Maszara, Morgan Hill, CA (US);

Zoran Krivokapic, Santa Clara, CA (US);

Ming-ren Lin, Cupertino, CA (US);

Inventors:

Qi Xiang, San Jose, CA (US);

Niraj Subba, Sunnyvale, CA (US);

Witold P. Maszara, Morgan Hill, CA (US);

Zoran Krivokapic, Santa Clara, CA (US);

Ming-Ren Lin, Cupertino, CA (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor substrate is provided having an insulator thereon with a semiconductor layer on the insulator. A deep trench isolation is formed, introducing strain to the semiconductor layer. A gate dielectric and a gate are formed on the semiconductor layer. A spacer is formed around the gate, and the semiconductor layer and the insulator are removed outside the spacer. Recessed source/drain are formed outside the spacer.


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