The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 04, 2007
Filed:
Dec. 13, 2005
Kang-woon Lee, Seoul, KR;
Byung-jun Min, Yongin-si, KR;
Han-joo Lee, Seoul, KR;
Byung-gil Jeon, Suwon-si, KR;
Kang-Woon Lee, Seoul, KR;
Byung-Jun Min, Yongin-si, KR;
Han-Joo Lee, Seoul, KR;
Byung-Gil Jeon, Suwon-si, KR;
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;
Abstract
A drive circuit of a FRAM (Ferroelectric Random Access Memory) includes an address buffer circuit that buffers an applied external address signal and generates an internal address signal, and detects a transition of the internal address signal and generates address transition detection signals for respective internal address signals. The FRAM includes a composite pulse signal generating circuit which limits a subsequent generation of a composite pulse signal for a delay interval provided after a generation of a previous composite pulse signal, in generating the second composite pulse signal obtained by totaling the respective address transition detection signals. The FRAM includes an internal chip enable buffer circuit which generates an internal chip enable signal to generate an internal control signal, in response to the composite pulse signal.