The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 20, 2007
Filed:
Jun. 10, 2003
Varghese George, Folsom, CA (US);
Mark A. Newman, Folsom, CA (US);
Sanjeev Jahagirdar, Folsom, CA (US);
Inder M. Sodhi, Folsom, CA (US);
Tanjeer R. Khondker, Folsom, CA (US);
Mathew B. Nazareth, El Dorado Hills, CA (US);
John B. Conrad, Folsom, CA (US);
Varghese George, Folsom, CA (US);
Mark A. Newman, Folsom, CA (US);
Sanjeev Jahagirdar, Folsom, CA (US);
Inder M. Sodhi, Folsom, CA (US);
Tanjeer R. Khondker, Folsom, CA (US);
Mathew B. Nazareth, El Dorado Hills, CA (US);
John B. Conrad, Folsom, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A method and apparatus automatically transferring to an enhanced low-power state of a processor is disclosed. In one embodiment, either all or a portion of a processor core clock distribution grid may be powered down in these enhanced low-power states. In one embodiment, the processor may operate in a reduced power supply voltage and operate at a reduced frequency during these enhanced low-power states. In one embodiment, a portion of the clock distribution grid may be left on to support snoop operations at a reduced frequency.