The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 13, 2007

Filed:

Feb. 12, 1999
Applicants:

Yen-shih Ho, Chai-yi, TW;

Jau-yuann Chung, Hsin-chu, TW;

Chun-hon Chen, Hsin-chu, TW;

Hun-jan Tao, Hsin-chu, TW;

Inventors:

Yen-Shih Ho, Chai-yi, TW;

Jau-Yuann Chung, Hsin-chu, TW;

Chun-Hon Chen, Hsin-chu, TW;

Hun-Jan Tao, Hsin-chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for fabricating an improved metal-insulator-metal capacitor is achieved. An insulating layer is provided overlying conducting lines on a semiconductor substrate. Via openings through the insulating layer to the conducting lines are filled with metal plugs. A first metal layer is deposited overlying the insulating layer and the metal plugs. A capacitor dielectric layer is deposited overlying the first metal layer wherein capacitor dielectric layer is deposited as a dual layer, each layer deposited within a separate chamber whereby pinholes are eliminated. A second metal layer and a barrier metal layer are deposited overlying the capacitor dielectric layer. The second metal layer and the barrier metal layer are patterned to form a top plate electrode. Thereafter, the capacitor dielectric layer and the first metal layer are patterned to form a bottom plate electrode completing fabrication of a metal-insulator-metal capacitor.


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