The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 16, 2007
Filed:
Dec. 21, 2004
Kevin D. Lucas, Meylan, FR;
Robert E. Boone, Grenoble, FR;
Mehul D. Shroff, Austin, TX (US);
Kirk J. Strozewski, Round Rock, TX (US);
Chi-min Yuan, Austin, TX (US);
Jason T. Porter, Austin, TX (US);
Kevin D. Lucas, Meylan, FR;
Robert E. Boone, Grenoble, FR;
Mehul D. Shroff, Austin, TX (US);
Kirk J. Strozewski, Round Rock, TX (US);
Chi-Min Yuan, Austin, TX (US);
Jason T. Porter, Austin, TX (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A method for improving manufacturability of a design includes performing space or enclosure checks on multiple interacting layers of a layout design and then using the resulting space or enclosure data to move predetermined feature edges in an altered design database to decrease the risk of features widths, feature spaces or feature enclosures being patterned smaller than designed. In some embodiments, the upsized features are larger in the wafer circuit pattern than are drawn in a designed database. The method for improving manufacturability of a design, in some embodiments, is stored on a computer readable storage medium.