The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 16, 2007
Filed:
Jul. 14, 2006
Tsuyoshi Tamaru, Hachioji, JP;
Kazutoshi Oomori, Ome, JP;
Noriko Miura, Ome, JP;
Hideo Aoki, Musashimurayama, JP;
Takayuki Oshima, Ome, JP;
Tsuyoshi Tamaru, Hachioji, JP;
Kazutoshi Oomori, Ome, JP;
Noriko Miura, Ome, JP;
Hideo Aoki, Musashimurayama, JP;
Takayuki Oshima, Ome, JP;
Renesas Technology Corp., Tokyo, JP;
Abstract
A method of manufacturing a semiconductor integrated circuit device is provided including forming a first insulating film comprised of fluorine-containing silicon oxide over a main surface of a semiconductor substrate is formed together with forming a second insulating film comprising silicon oxide as a major component, forming a third insulating film comprising silicon carbide as a major component, and forming a fourth insulating film comprised of fluorine-containing silicon oxide. The fourth insulating film is removed at a wiring groove-forming region thereof by dry etching using a first photoresist film as a mask. A first conductive layer is buried inside the wiring groove and the first conductive layer is removed from outside of the wiring groove by a chemical mechanical polishing method, thereby forming a first wiring including the first conductive layer inside the wiring groove.