The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 09, 2007

Filed:

Dec. 13, 2005
Applicants:

Hsin-kuan Wu, Hsin-Tien, TW;

Hsing-chou Hsu, Hsin-Tien, TW;

Sheng-yuan Lee, Hsin-Tien, TW;

Inventors:

Hsin-Kuan Wu, Hsin-Tien, TW;

Hsing-Chou Hsu, Hsin-Tien, TW;

Sheng-Yuan Lee, Hsin-Tien, TW;

Assignee:

VIA Technologies, Inc., Taipei Hsien, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

A testing assembly for an electrical test of an electronic package is provided. The testing assembly includes a testing circuit board and a testing socket mounted thereon. The testing socket includes an insulating body and a plurality of pins. The insulating body has a holding surface for supporting a contact surface of the electronic package, and at least one low-dielectric constant region located between two neighboring pins, and the dielectric constant of the low-electric constant region is lower than other regions of the insulating body. In addition, the pins passing through the insulating body are configured as the electric channels between a plurality of contacts on the contact surface and a plurality of testing pads on a conductive layer on a surface of the testing circuit board. Furthermore, the pins include a signal pin, and one end of the signal pin is electrically coupled to the signal testing pad.


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