The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 02, 2007

Filed:

Dec. 01, 2003
Applicants:

Masashi Ichikawa, Fukushima, JP;

Takeshi Kobayashi, Fukushima, JP;

Miho Iwabuchi, Fukushima, JP;

Inventors:

Masashi Ichikawa, Fukushima, JP;

Takeshi Kobayashi, Fukushima, JP;

Miho Iwabuchi, Fukushima, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/30 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention provides a manufacturing method for an SOI wafer with a high productivity in which generation of a void is suppressed in manufacturing the SOI wafer. In a manufacturing method for an SOI wafer of the present invention in which two starting wafers are prepared, an insulating layer is formed on at least one of the two starting wafers and the one wafer is adhered to the other wafer without using an adhesive agent, the starting wafers each with no line defect on a surface thereof are used. In a manufacturing method for an SOI wafer of the present invention in which two starting wafers are prepared, an insulating layer is formed on at least one of the two starting wafers and the one wafer is adhered to the other wafer without using an adhesive agent, the starting wafers are subjected to a high temperature heat treatment in advance.


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