The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 11, 2007

Filed:

Aug. 24, 2005
Applicants:

Mitsuo Hori, Tokyo, JP;

Hideki Tada, Tokyo, JP;

Takahiro Kataoka, Tokyo, JP;

Hiroyuki Sekiguchi, Tokyo, JP;

Kazuo Mukawa, Tokyo, JP;

Inventors:

Mitsuo Hori, Tokyo, JP;

Hideki Tada, Tokyo, JP;

Takahiro Kataoka, Tokyo, JP;

Hiroyuki Sekiguchi, Tokyo, JP;

Kazuo Mukawa, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A test program debugging apparatus of the present invention includes a device under test simulator and a semiconductor testing apparatus simulator. Further, the semiconductor testing apparatus simulator includes: a verification range acquiring unit that acquires a verification range that is a range of commands to be verified among commands included in the test program; a command simplifying unit that simplifies non-setting commands other than setting commands for setting the device under test simulator, among non-verification range commands included in a non-verification range that is a range other than the verification range within the test program; and a command executing unit that executes the verification range commands included in the verification range, the setting commands, and the non-setting commands simplified by the command simplifying unit.


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