The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7250576 B1

PDF
Full Text
Expired
Date of Patent:
Jul. 31, 2007

Filed:

May. 19, 2005
Applicants:

Evan G. Colgan, Chestnut Ridge, NY (US);

David L. Edwards, Poughkeepsie, NY (US);

Benjamin V. Fasano, New Windsor, NY (US);

Kamal K. Sikka, Poughkeepsie, NY (US);

Jeffrey A. Zitz, Poughkeepsie, NY (US);

Wei Zou, Wappingers Falls, NY (US);

Inventors:

Evan G. Colgan, Chestnut Ridge, NY (US);

David L. Edwards, Poughkeepsie, NY (US);

Benjamin V. Fasano, New Windsor, NY (US);

Kamal K. Sikka, Poughkeepsie, NY (US);

Jeffrey A. Zitz, Poughkeepsie, NY (US);

Wei Zou, Wappingers Falls, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/16 (2006.01);
U.S. Cl.
CPC ...
Abstract

A chip package including a chip extension for containing thermal interface material (TIM) and improves chip cooling, and a related method, are disclosed. In particular, the chip package includes a chip, a cooling structure coupled to the chip via a TIM, and a chip extension may be thermally coupled to an outer edge of the chip. A TIM placed between the chip and the cooling structure is contained during thermal cycling by the chip extension such that void formation at the edge of the chip, which can move between the chip and cooling structure, is suppressed. The chip extension also improves lateral heat dissipation by providing a greater thermal contact area between the cooling structure and the chip and, if needed, the substrate at a much lower cost than using larger die with lower production unit output from a wafer.


Find Patent Forward Citations

Colgan, Evan. (2007). Chip package having chip extension and method (U.S. Patent No. 7250576). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7250576

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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