The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 24, 2007

Filed:

Sep. 30, 2003
Applicants:

Christopher L. Rumer, Chandler, AZ (US);

Kuljeet Singh, Folsom, CA (US);

Inventors:

Christopher L. Rumer, Chandler, AZ (US);

Kuljeet Singh, Folsom, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/48 (2006.01); H01L 21/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor die having a through via formed therein is disclosed. A first conductive layer is formed on the front side of the die and a second conductive layer is formed on the backside of the die, and coupled with the through via. A first package substrate is electrically coupled with the first conductive layer, and a second package substrate is electrically coupled with the second conductive layer. In another embodiment, a substrate ball electrically couples the first and second package substrates. In a further embodiment, a flip chip bump is attached to the first package substrate.


Find Patent Forward Citations

Rumer, Christopher. (2007). Method and apparatus for a dual substrate package (U.S. Patent No. 7247517). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7247517

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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