The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 03, 2007
Filed:
Apr. 06, 2004
Hiroyasu Yoshida, Tokyo, JP;
Kanji Oishi, Tokyo, JP;
Hiroyasu Yoshida, Tokyo, JP;
Kanji Oishi, Tokyo, JP;
Elpida Memory, Inc., Tokyo, JP;
Abstract
A testing device for a semiconductor storage device suppresses the increase in the circuit size, provides for facilitated accommodation to a test with frequent changes in the test pattern, and improves testability of the semiconductor storage device. A plurality of holding circuits are provided holding write data for memory cells of a memory cell array. (Original) The write data from the holding circuits are written in the memory cells of the selected address. A plurality of comparators are supplied with data read out from the memory cells and with data held by the holding circuits as expectation data to compare the readout data and the expectation data. The non-inverted or inverted value of the write data held by the holding circuits is output as the write data to the memory cells and as expectation data to the comparators depending on the value of the inversion control signal.