The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 26, 2007
Filed:
Sep. 17, 2004
Sinan Goktepeli, Austin, TX (US);
Alexander A. Demkov, Austin, TX (US);
Marius K. Orlowski, Austin, TX (US);
Sinan Goktepeli, Austin, TX (US);
Alexander A. Demkov, Austin, TX (US);
Marius K. Orlowski, Austin, TX (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A semiconductor device () having a gate (or) with a thin conductive layer () is described. As the physical dimensions of semiconductor devices are scaled below the sub-micron regime, very thin gate dielectrics () are used. One problem encountered with very thin gate dielectrics is that the carriers can tunnel through the gate dielectric material, thus increasing the undesirable leakage current in the device. By using a thin layer for conductive layer (), quantum confinement of carriers within conductive layer () can be induced. This quantum confinement removes modes which are propagating in the direction normal to the interfacial planefrom the Fermi level. Thus, the undesirable leakage current in the device () can be reduced. Additional conductive layers (e.g.) may be used to provide more carriers.