The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 12, 2007
Filed:
May. 27, 2005
Takasumi Ohyanagi, Hitachinaka, JP;
Atsuo Watanabe, Hitachiota, JP;
Rajesh Kumar Malhan, Nagoya, JP;
Tsuyoshi Yamamoto, Kariya, JP;
Toshiyuki Morishita, Nagoya, JP;
Takasumi Ohyanagi, Hitachinaka, JP;
Atsuo Watanabe, Hitachiota, JP;
Rajesh Kumar Malhan, Nagoya, JP;
Tsuyoshi Yamamoto, Kariya, JP;
Toshiyuki Morishita, Nagoya, JP;
Hitachi, Ltd., Tokyo, JP;
DENSO Corporation, Kariya, Aichi Pref., JP;
Abstract
A silicon carbide semiconductor device such as JFET, SIT and the like is provided for accomplishing a reduction in on-resistance and high-speed switching operations. In the JFET or SIT which turns on/off a current with a depletion layer extending in a channel between a gate region formed along trench grooves, a gate contact layer and a gate electrode, which can be supplied with voltages from the outside, are formed on one surface of a semiconductor substrate or on the bottom of the trench groove. A metal conductor (virtual gate electrode) is formed in ohmic contact with a p++ contact layer of the gate region on the bottom of the trench grooves independently of the gate electrode. The virtual gate electrode is electrically isolated from the gate electrode and an external wire.