The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 08, 2007

Filed:

Jun. 26, 2003
Applicants:

Talal K. Jaber, Austin, TX (US);

Srinivas Patil, Austin, TX (US);

Larry E. Thatcher, Austin, TX (US);

Chih-jen M. Lin, Austin, TX (US);

Anil K. Sabbavarapu, Austin, TX (US);

David M. Wu, Austin, TX (US);

Madhukar K. Reddy, Austin, TX (US);

Inventors:

Talal K. Jaber, Austin, TX (US);

Srinivas Patil, Austin, TX (US);

Larry E. Thatcher, Austin, TX (US);

Chih-Jen M. Lin, Austin, TX (US);

Anil K. Sabbavarapu, Austin, TX (US);

David M. Wu, Austin, TX (US);

Madhukar K. Reddy, Austin, TX (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

A testing architecture for testing a complex integrated circuit in which each functional unit may be tested independently of the others. Embodiments of the invention allow testing of functional units to take place at slower or faster clock speeds than other portions of the processor without incurring delay or other adverse timing effects.


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