The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 10, 2007
Filed:
Jun. 04, 2004
R. Dean Adams, St. George, VT (US);
Robert Abbott, Ottawa, CA;
Xiaoliang Bai, La Jolla, CA (US);
Dwayne M. Burek, San Jose, CA (US);
R. Dean Adams, St. George, VT (US);
Robert Abbott, Ottawa, CA;
Xiaoliang Bai, La Jolla, CA (US);
Dwayne M. Burek, San Jose, CA (US);
Magma Design Automation, Inc., Santa Clara, CA (US);
Abstract
A memory logic built-in self-test ('BIST') includes slow speed controller-to-collar signals, while allowing collars to test memories at full speed. A controller is configured to include control features and address, data, read/write, output evaluation, and redundancy calculation values are configured within the collars. The controller is further configured to handle scheduling of the collars and diagnostics interfacing. In addition, the collars are configured to allow BIST testing to be run serially, in parallel, or in groups. Collars are also configured to send diagnostic results back to the controller based on the initialization of the respective collars, thus providing a central interface for the diagnostics results.