The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 10, 2007
Filed:
Jun. 30, 2004
Tim Frodsham, Portland, OR (US);
Lakshminarayan Krishnamurty, Hillsboro, OR (US);
Naveen Cherukuri, San Jose, CA (US);
Sanjay Dabral, Palo Alto, CA (US);
David S. Dunning, Portland, OR (US);
Theodore Z. Schoenborn, Portland, OR (US);
Tim Frodsham, Portland, OR (US);
Lakshminarayan Krishnamurty, Hillsboro, OR (US);
Naveen Cherukuri, San Jose, CA (US);
Sanjay Dabral, Palo Alto, CA (US);
David S. Dunning, Portland, OR (US);
Theodore Z. Schoenborn, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A software self test engine is executed from a cache of a processor. The software self test engine is executed using an execution engine of the processor to perform a physical layer self test. The physical layer self test is performed by transmitting a test vector from the execution engine under control of the self test engine to an input/output ('I/O') unit of the processor along a datapath coupling the execution engine to the I/O unit. The test vector is transmitted along a loop back path including the I/O unit and the datapath to test a hardware device along the loop back path.