The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 10, 2007

Filed:

Dec. 31, 2002
Applicants:

Ranan Fraer, Haifa, IL;

Osnat Weissberg, Haifa, IL;

Amitai Irron, Kibbutz Barkai, IL;

Gila Kamhi, Zichron Yaakov, IL;

Marcelo Glusman, Maalot, IL;

Sela Mador-haim, Binyamina Area, IL;

Moshe Y. Vardi, Bellaire, TX (US);

Inventors:

Ranan Fraer, Haifa, IL;

Osnat Weissberg, Haifa, IL;

Amitai Irron, Kibbutz Barkai, IL;

Gila Kamhi, Zichron Yaakov, IL;

Marcelo Glusman, Maalot, IL;

Sela Mador-Haim, Binyamina Area, IL;

Moshe Y. Vardi, Bellaire, TX (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

Briefly, a system and a method of formal verification and failure analysis and rectification of models or designs, e.g., VLSI designs, of processors, circuits and logical systems. Embodiments of the system may include a multi-value annotation scheme for annotating different types of values of signals, and a post-annotation scheme for further analysis based on the annotated values. Some embodiments of the invention may optionally include a generator of counter-examples of a given length.


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