The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 03, 2007
Filed:
Jul. 30, 2004
Duofeng Yue, Plano, TX (US);
Peijun J. Chen, Dallas, TX (US);
Sue Ellen Crank, Coppell, TX (US);
Thomas D. Bonifield, Dallas, TX (US);
Jiong-ping LU, Richardson, TX (US);
Jie-jie Xu, Plano, TX (US);
Duofeng Yue, Plano, TX (US);
Peijun J. Chen, Dallas, TX (US);
Sue Ellen Crank, Coppell, TX (US);
Thomas D. Bonifield, Dallas, TX (US);
Jiong-Ping Lu, Richardson, TX (US);
Jie-Jie Xu, Plano, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
The present invention provides a method of manufacturing a metal silicide electrode () for a semiconductor device (). The method comprises implanting small atoms into an nMOS semiconductor substrate () to a depth () no greater than about 30 nanometers into the nMOS semiconductor substrate. The method further comprises depositing a transition metal layer () over the nMOS semiconductor substrate. The transition metal layer and the nMOS semiconductor substrate are reacted to form the metal silicide electrode. Other aspects of the present invention include a method of manufacturing an integrated circuit ().