The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 20, 2007
Filed:
Feb. 23, 2005
Chia-lun Hsu, Taipei, TW;
Mu-yi Liu, Taichung, TW;
Tao-cheng Liu, Hsinchu, TW;
Ichen Yang, Changhua, TW;
Kuan-po Chen, Taipei, TW;
Chia-Lun Hsu, Taipei, TW;
Mu-Yi Liu, Taichung, TW;
Tao-Cheng Liu, Hsinchu, TW;
Ichen Yang, Changhua, TW;
Kuan-Po Chen, Taipei, TW;
Macronix International Co., Ltd, Hsinchu, TW;
Abstract
A lateral double diffused metal oxide semiconductor (LDMOS) device, and method of fabricating such a device, are provided. The method comprises the steps of: (a) providing a substrate of a first conductivity type; (b) forming within the substrate a well region of a second conductivity type, the well region having a super steep retrograde (SSR) well profile in which a doping concentration changes with depth so as to provide a lighter doping concentration in a surface region of the well region than in a region below the surface region of the well region; (c) forming a gate layer which partly overlies the well region and is insulated from the well region; and (d) forming one of a source region and a drain region in the well region. The presence of the SSR well region provides a lighter surface doping to enable a higher breakdown voltage to be obtained within the LDMOS device, and heavier sub-surface doping to decrease the on-resistance.