The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 13, 2007
Filed:
Dec. 26, 2002
Shivnandan D. Kaushik, Portland, OR (US);
John W. Horigan, Mountain View, CA (US);
Alon Naveh, Ramat Hasharon, IL;
James B. Crossland, Banks, OR (US);
Shivnandan D. Kaushik, Portland, OR (US);
John W. Horigan, Mountain View, CA (US);
Alon Naveh, Ramat Hasharon, IL;
James B. Crossland, Banks, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A method for a mechanism for processor power state aware distribution of lowest priority interrupts. The method of one embodiment comprises receiving first power state information from a first component and second power state information from a second component. First task priority information from the first component and second task priority from the second component are also received. An interrupt request from a first device for servicing is received. Power state and task priority information for the first and second components are evaluated to determine which component should service the interrupt request. Either the first component or the second component is selected to be a destination component to service the interrupt request based on the power state and task priority information. The interrupt request is communicated to the destination component.