The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 13, 2007

Filed:

Dec. 11, 2003
Applicants:

Ken Uchikoshi, Hitachinaka, JP;

Naokatsu Suwanai, Hitachinaka, JP;

Atsushi Tachigami, Mito, JP;

Katsuhiko Hotta, Hachioji, JP;

Masashi Sahara, Hitachinaka, JP;

Kazuhiko Sato, Sagamihara, JP;

Inventors:

Ken Uchikoshi, Hitachinaka, JP;

Naokatsu Suwanai, Hitachinaka, JP;

Atsushi Tachigami, Mito, JP;

Katsuhiko Hotta, Hachioji, JP;

Masashi Sahara, Hitachinaka, JP;

Kazuhiko Sato, Sagamihara, JP;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01);
U.S. Cl.
CPC ...
Abstract

An insulating portion of the respective wiring layers for a semiconductor device is constituted of insulating films. The one insulating film is made of a material whose conductivity is higher than that of the other insulating film that is made of an ordinary silicon oxide film and is provided in contact with the wiring. An electric charge accumulated in the wiring generated in the course of manufacture of the semiconductor device is discharged through the one insulating film at a stage where a charge accumulation in the wiring is low. This permits the heat release value generated through the discharge can be suppressed to a low level, and the short-circuiting failure between adjacent wirings can be suppressed or prevented.


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