The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 06, 2007

Filed:

Sep. 09, 2002
Applicants:

Hajime Nagano, Yokohama, JP;

Takashi Yamada, Ebina, JP;

Tsutomu Sato, Yokohama, JP;

Ichiro Mizushima, Yokohama, JP;

Hisato Oyamatsu, Yokohama, JP;

Inventors:

Hajime Nagano, Yokohama, JP;

Takashi Yamada, Ebina, JP;

Tsutomu Sato, Yokohama, JP;

Ichiro Mizushima, Yokohama, JP;

Hisato Oyamatsu, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of manufacturing a semiconductor device substrate is disclosed, which comprises forming a mask layer patterned on a semiconductor layer insulated from a surface of a semiconductor substrate by an electrically insulating layer, etching the semiconductor layer according to the pattern of the mask layer to form a trench leading to the insulating layer, etching a protective layer deposited thinner on the semiconductor substrate than the thickness of the insulating layer to form a sidewall protective film which covers a side surface of the trench, etching the insulating layer from a bottom surface of the trench to the semiconductor substrate; and growing a single-crystalline layer from the surface of the semiconductor substrate exposed as a result of etching the insulating layer.


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