The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 27, 2007
Filed:
Jun. 04, 2001
Mukesh K. Puri, Fremont, CA (US);
Ghasi R. Agrawal, San Jose, CA (US);
Thompson W. Crosby, San Jose, CA (US);
Mukesh K. Puri, Fremont, CA (US);
Ghasi R. Agrawal, San Jose, CA (US);
Thompson W. Crosby, San Jose, CA (US);
LSI Logic Corporation, Milpitas, CA (US);
Abstract
A semiconductor memory testing implementation suitable for build-in self repair (BISR) memories provides, in one embodiment, a memory testing circuit configuration including an output register for receiving digital data. A plurality of shift registers serially output the digital data to be received by the output register. Each one of the plurality of shift registers includes a feedback path for enabling the digital data output by a corresponding one of the plurality of shift registers to be input back into the corresponding shift register in a same sequence as the digital data is output from the corresponding shift register.