The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 27, 2007
Filed:
May. 20, 2004
Jiong-ping LU, Richardson, TX (US);
Gregory Shinn, Dallas, TX (US);
Ping Jiang, Plano, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
The present invention provides a method for manufacturing a semiconductor device and a method for manufacturing an integrated circuit including the semiconductor device. The method for manufacturing the semiconductor device, among other possible steps, includes forming a polysilicon gate electrode () over a substrate () and forming source/drain regions () in the substrate () proximate the polysilicon gate electrode (). The method further includes forming a protective layer () over the source/drain regions () and the polysilicon gate electrode (), then removing the protective layer () from over a top surface of the polysilicon gate electrode () while leaving the protective layer () over the source/drain regions (). After the protective layer () has been removed from over the top surface of the polysilicon gate electrode (), the polysilicon gate electrode () is silicided to form a silicided gate electrode (). The protective layer () is also removed from over the source/drain regions () and source/drain contact regions () are formed.