The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 13, 2007

Filed:

Dec. 16, 2004
Applicants:

Zheng Chen, Macungie, PA (US);

Nhon Nguyen, Austin, TX (US);

Hemanshu Vernenker, Austin, TX (US);

Allen White, Austin, TX (US);

Christopher Hume, Austin, TX (US);

Inventors:

Zheng Chen, Macungie, PA (US);

Nhon Nguyen, Austin, TX (US);

Hemanshu Vernenker, Austin, TX (US);

Allen White, Austin, TX (US);

Christopher Hume, Austin, TX (US);

Assignee:

Lattice Semiconductor Corporation, Hillsboro, OR (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 17/18 (2006.01);
U.S. Cl.
CPC ...
Abstract

In accordance with one embodiment of the present invention, a programmable logic device includes at least one block of memory having a plurality of memory cells and a plurality of fuses adapted to provide a first set of signals that determines a first configuration for the at least one block of memory. A plurality of multiplexers are adapted to select the first set of signals from the plurality of fuses to configure the at least one block of memory in the first configuration or a second set of signals to configure the at least one block of memory in a second configuration.


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